Dimin Niu

Matrix: Multi-Cipher Structures Dataflow for Parallel and Pipelined TFHE Accelerator

Ling Liang

• Sep 19, 2025 • 1 min read

H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference

Cong Li

• Jun 21, 2025 • 1 min read

Salus: A Practical Trusted Execution Environment for CPU-FPGA Heterogeneous Cloud Platforms

Yu Zou

• Jan 1, 2024 • 1 min read

A Tightly Coupled AI-ISP Vision Processor

Hao Zhang

• Jan 1, 2024 • 1 min read

Tt-gnn: Efficient on-chip graph neural network training via embedding reformation and hardware optimization

Zheng Qu

• Jan 1, 2023 • 1 min read

Spada: Accelerating sparse matrix multiplication with adaptive dataflow

Zhiyao Li

• Jan 1, 2023 • 1 min read

Predicting the output structure of sparse matrix multiplication with sampled compression ratio

Zhaoyang Du

• Jan 1, 2023 • 1 min read

MPU: Memory-centric SIMT processor via in-DRAM near-bank computing

Xinfeng Xie

• Jan 1, 2023 • 1 min read

Mnsim 2.0: A behavior-level modeling tool for processing-in-memory architectures

Zhenhua Zhu

• Jan 1, 2023 • 1 min read

Accelerating distributed GNN training by codes

Yanhong Wang

• Jan 1, 2023 • 1 min read