ArchExplorer: Microarchitecture exploration via bottleneck analysis Jan 1, 2023· Dr. Chen Bai , Jiayi Huang , Xuechao Wei , Yuzhe Ma , Sicheng Li , Hongzhong Zheng , Bei Yu Prof. Yuan Xie · 0 min read Cite Type Conference paper Publication Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture Last updated on Jan 1, 2023 Authors Dr. Chen Bai Postdoc Researcher Chen Bai’s research interests include computer architecture and electronic design automation. He received best paper awards from ICCAD 2021 and ISPD 2024. Authors Prof. Yuan Xie Chair Professor Fang Professor of Engineering | Chair Professor | IEEE/ACM/AAAS Fellow ← Alcop: Automatic load-compute pipelining in deep learning compiler for ai-gpus Jan 1, 2023 CHAM: A customized homomorphic encryption accelerator for fast matrix-vector product Jan 1, 2023 →