Rm-stc: Row-merge dataflow inspired gpu sparse tensor core for energy-efficient sparse acceleration Jan 1, 2023· Guyue Huang , Zhengyang Wang , Po-an Tsai , Chen Zhang , Yufei Ding Prof. Yuan Xie · 0 min read Cite Type Conference paper Publication Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture Last updated on Jan 1, 2023 Authors Prof. Yuan Xie Chair Professor Fang Professor of Engineering | Chair Professor | IEEE/ACM/AAAS Fellow ← Predicting the output structure of sparse matrix multiplication with sampled compression ratio Jan 1, 2023 Spada: Accelerating sparse matrix multiplication with adaptive dataflow Jan 1, 2023 →