Dstc: Dual-side sparsity tensor core for dnns acceleration on modern gpu architectures Jan 1, 2024· Chen Zhang , Yang Wang , Zhiqiang Xie , Cong Guo , Yunxin Liu , Jingwen Leng , Guangyu Sun , Zhigang Ji , Runsheng Wang Prof. Yuan Xie , Others · 0 min read Cite Type Journal article Publication IEEE Transactions on Computers Last updated on Jan 1, 2024 Authors Prof. Yuan Xie Chair Professor Fang Professor of Engineering | Chair Professor | IEEE/ACM/AAAS Fellow ← A Tightly Coupled AI-ISP Vision Processor Jan 1, 2024 Enabling efficient sparse multiplications on GPUs with heuristic adaptability Jan 1, 2024 →